The table of instructions has been split into several smaller files, partly because it was really big (90K), but mainly to get around a bug in some versions of Netscape, which don't like huge tables.
The lists contains all the normal machine code instructions for the microprocessor, plus a number of undocumented ones. The latter comprise those which operate on the high or low bytes of the Index registets (IX and lY) which are notated here as HIX, LIX, HIY and LIY - some assemblers may use the form IXH, etc - and a set of rotation instructions complementary to SRL, which are designated SLL.
Within the tables of instructions, a number of abbreviations are used:
| d | displacement (a value from -128 (&80) to +127 (&7F)) |
| n | a single byte value (from 0 (&00) to 255 (&FF)) |
| hilo | a double byte value (from -32768 (&8000) via 0 to 32767 (&7FFF)) |
| addr | an address value (from 0 (&0000) to 65535 (&FFFF)) |
(in the sequence of opcode bytes, `addr' and `hilo' are entered low byte first)
The next two columns detail the number of bytes applicable to each instruction, and the number of T states (clock pulses) that each requires - some have two figures which are distinguised as follows:
| f | means `the number of T states required when the condition is false' |
| t | means `the number of T states needed when the condition is true' |
| = | means `the number of T states needed when either BC=0 and/or A matches the contents of HL' |
| # | means `the number of T states required when both the above conditions are false' |
| z | means `the number of T states needed when B=0' |
| nz | means `the number of T states requrred when B<>0' |
The last columns give the effect on the flag bits which each instruction causes:
| ? | means the setting of the bit is unpredictable |
| - | means the setting of the bit is unchanged |
| 0 | means that the flag bit is reset to zero |
| 1 | means that the flag bit is set to one. |
| In addition, the Sign flag (bit 7) is also set: | |
| 7 | if bit 7 of the A register is set |
| 15 | if bit 15 of the HL register pair (ie bit 7 of the H register) is set |
| =7 | if bit 7 of the A register would be set by subtraction in lieu of CP |
| The Zero flag (bi6 6) is also set: | |
| z | if the A register or the HL register pair equals zero |
| = | if the A register matches the compared register or value |
| =A | if the A register matches the contents of the address pointed to by HL |
| <>B | if the B register holds zero |
| <>b | if the bit tested is zero |
| The Parity/Overflow flag (bit 2) is also set: | |
| p | if the register concemed contains an even number of set bits |
| v | if an overflow has occured in Two's Complement arithmetic |
| BC | if BC is not zero |
| A80 | if the A register was &80 before this instruction was performed |
| i | to the contents of the microprocessor's internal interrupt register |
| The Carry flag (bit 0) is also set: | |
| c | if an addition resulted in a carry out of bit 7 (for a register) or bit 15 (for a register pair) |
| b | if a subtraction required a borrow from bit 7 (for a register) or bit 15 (for a register pair) |
| < | if the A register is less than the value or register that is being compared |
| r0 | by the bit rotated in from bit 0 of the register concerned |
| r7 | by the bit rotated in from bit 7 of the register concerned |
| x | if the Carry was reset (ie zero) before this instruction was performed |
| A0 | if tbe A register was &00 before this instruction was performed |
The flag register is bit significant, and the bits are defined as follows: